View 1203P_399014.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

T H AT Corporation
FEATURES
* High common-mode rejection (typical 90 dB at 60 Hz) maintained under real-world conditions Excellent solution for hum and groundloop suppression Transformer-like noise rejection in an 8-pin IC, at fraction of transformer cost and size * * * *
InGeniusa High-CMRR Balanced Input Line Receiver THAT 1200, 1203, 1206 APPLICATIONS
Balanced input stages Summing amplifiers Transformer front-end replacements ADC front-ends
* *
Description
The THAT 1200 series of InGenius balanced line receivers are designed to overcome a serious limitation of conventional balanced input stages -- notoriously poor common mode rejection in real world applications. While conventional input stages may exhibit good rejection characteristics in the lab and on paper, they perform poorly when fed from even slightly unbalanced source impedances -- a common situation in almost any pro sound environment. Developed by Bill Whitlock of Jensen Transformers, the patented InGenius input stage uses a unique bootstrap circuit to raise its commonmode input impedance into the megohm range, but without the noise penalty that comes from high-valued resistors. InGenius line receivers maintain their high CMRR over a wide range of source impedance imbalances -- even when fed from single-ended sources.
Pin Name
DIP Pin 1 2 3 4 5 6 7 8
SO Pin 3 4 5 6 11 12 13 14
OA1 INRa +1 Rc
Ref
R1
R2 Vcc Vee Vout
InIn+ Vee CM In Vout Vcc
OA4 +1
OA3
+ R4 R5
Rb IN+
OA2 Rd +1
R3
CM Out
REF
Table 1. 1200-series pin assignments Gain 0 dB Plastic DIP 1200P 1203P 1206P Plastic SO 1200S 1203S 1206S
CM IN
CM OUT
Cb
-3 dB -6 dB
Figure 1. THAT1200-series equivalent circuit diagram
Table 2. Ordering information
Protected under U.S. Patent No. 5,568,561 and other patents pending. InGeniusa is a trademark of THAT Corporation.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
600033 Rev 0A
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 2
InGenius Balanced Line Receiver Preliminary Information
SPECIFICATIONS
1
Absolute Maximum Ratings (T A = 25C)
Positive Supply Voltage (VCC) Negative Supply Voltage (VEE) Positive Input Voltage (VIN+) Negative Input Voltage (VIN-) Output Short-Circuit Duration (tSH) +18 V -18 V +18 V -18 V Continuous Power Dissipation (PD) (TA = 75C) Operating Temperature Range (TOP) Storage Temperature Range (TST) Junction Temperature (TJ) Lead Temperature (Soldering 60 seconds) TBD mW 0 to +70C -40 to +125C 150C TBD C
Recommended Operating Conditions
Parameter Positive Supply Voltage Negative Supply Voltage Symbol VCC VEE Conditions Min +3 -3 Typ Max +18 -18 Units V V
Electrical Characteristics
Parameter Supply Current Input Bias Current Symbol ICC IB Conditions No signal No signal; Either input connected to GND No signal No signal
2
Min -- --
Typ 4.7 700
Max 8.0 1,400
Units mA nA
Input Offset Current Input Offset Voltage Input Voltage Range
IB-OFF VOFF VIN-CM VIN-DIFF
-- --
-- -- 13.0 21.5 24.5 24.5 48.0 with bootstrap 10.0 3.2 no bootstrap 36.0 36.0
140 10 -- -- -- --
nA mV V dBu dBu dBu kW MW MW kW kW
Common mode 12.5 Differential (equal and opposite swing) THAT 1200 21.0 THAT 1203 24.0 THAT 1206 24.0 Differential Common mode 60 Hz 20 kHz 60 Hz 20 kHz
Input Impedance
ZIN-DIFF ZIN-CM
1. All specifications are subject to change without notice. 2. Unless otherwise noted, TA=25C, VCC = +15V, VEE = -15V 3. 0 dBu = 0.775Vrms.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A Preliminary Information
Page 3
Electrical Characteristics (Cont'd)
Parameter Common Mode Rejection Symbol CMR1 Conditions Min Typ 90 90 85 Max -- -- -- Units dB dB dB
Matched source impedances; VCM = 10V DC 70 60 Hz 70 20 kHz --
Common Mode Rejection
CMR2
600W unmatched source impedances4; VCM = 10V 60 Hz -- 70 20 kHz -- 65 At 60 Hz, with VCC = -VEE THAT1200 THAT1203 THAT1206 At CM output, at 60 Hz
-- --
dB dB
Power Supply Rejection
5
PSR
-- -- -- --
82 80 80 63
-- -- -- --
dB dB dB dB
Power Supply Rejection
6
PSRCM THD
Total Harmonic Distortion
VIN-DIFF = 10 dBV; BW = 20 kHz; f = 1 kHz RL =2 kW -- BW = 20 kHz THAT1200 THAT1203 THAT1206 At CM output RL = 10 kW; CL = 300 pF With CM input signal RLcm = 10 kW; CLcm = 50 pF RL = 10 kW; CL = 10 pF THAT1200 THAT1203 THAT1206 RL = 2 kW; CL = 300 pF THAT1200 THAT1203 THAT1206 At CM output; RLcm = 10 kW CLcm = 10 pF CLcm = 50 pF f = 1 kHz; RL = 2 kW At max differential input THAT1200 THAT1203 THAT1206
0.0005
--
%
Output Noise
en(OUT)
-- -- -- -- 7* 12.5*
-106 -105 -107 -106 12 21
-- -- -- -- -- --
dBu dBu dBu dBu V/s V/s
Output Noise Slew Rate Slew Rate
enCM(OUT) SR SRCM
Small Signal Bandwidth
BW-3dB
-- -- -- -- -- --
22 27 34 17 18 20
-- -- -- -- -- --
MHz MHz MHz MHz MHz MHz
Small Signal Bandwidth
BWCM-3dB
-- -- --
20 18 0
-- -- 0.05
MHz MHz dB
Output Gain Error Output Voltage Swing
GER(OUT) VO
21 21 18
21.5 21.5 18.5
-- -- --
dBu dBu dBu
4. See test circuit in Figure 2. 5. Defined with respect to the differential gain. 6. Defined with respect to the common mode gain between any input and common mode output. * Guaranteed by design
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 4
InGenius Balanced Line Receiver Preliminary Information
Electrical Characteristics (Cont'd)
Parameter Output Short Circuit Current Symbol ISC ICMSC RLmin RLCMmin CLmax CLCMmax Conditions RL = RLcm = 0 W At CM output Min -- -- 2 10 -- -- Typ 25 10 -- -- -- -- Max -- -- -- -- 300 50 Units mA mA kW kW pF pF
Minimum Resistive Load
At CM output
Maximum Capacitive Load
At CM output
Cb 100u R3 600R In+ Vcc
2
R5 C1 56p C4 100R
CM Out Gnd
In-
R1 200k
R2 200k
8 In7 100n CMout Vcc 5 Out CMin Ref 6 Vee 3 1 In+ 4 U1
R6 100R R4 2k C2 300p
Main Out Gnd
C3 100n Ext. DC Source Gnd Vee
THAT120x
Figure 2. THAT1200-series test circuit
Applications
RFI Protection
Figure 3 shows the THAT 1200 configured with robust RFI input protection. In applications where RFI rejection is of less concern, the circuit shown Figure 4 provides a less aggressive approach. the low end of the audio spectrum. Its voltage rating is dependent on the topology of the surrounding circuitry, as described in the following paragraphs. AC signals presented to the input stage cause the two ends of capacitor Cb to swing in tandem so that virtually no voltage appears across the capacitor. Consequently, capacitors with small DC working voltages may be used when the previous stage is AC coupled to the input of the THAT 1200.
Bootstrap coupling capacitor
Referring to Figure 3, electrolytic capacitor Cb provides the feedback path for the boostrap circuit. The capacitor value is chosen to be high enough to present a sufficiently small impedance to signals at
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A Preliminary Information
Page 5
Vcc 21 3 5 423 1 J1 XLR-F D3 C2 470pF C3 470pF D1 12V R1 100R D4
Cb 220uF
+
(see text) 2 IN8
Vcc
R3 4k7 C4 100pF D5 D2 12V D6
R2 100R
7 U1 CM OUT VCC 5 CM OUT IN VEE REF 3 IN+ 4 1 Vee
6
OUT
optional RFI protection
Vee
Figure 3. THAT1200P typical application circuit
If, however, there is the possibility of a DC voltage appearing across the inputs of the line receiver, a portion of that voltage will appear directly across the terminals of capacitor Cb. In that case, choose the
capacitor's voltage rating so that it is capable of handling the expected level of DC voltage. If the polarity of the DC voltage is unknown, or may swing to either polarity, the use of a non-polarized electolytic is highly recommended.
Vcc
2 3 1
Cb D1 12V
J1 XLR-F D3
+
Vcc
220uF D4 2
54231
C1 C2
100pF NPO 100pF NPO D5 D2 12V Vee D6
8 IN7 U1 CM OUT VCC 5 CM OUT IN VEE REF 3 IN+ 4 1 Vee
6
OUT
Figure 4. THAT1200P showing simplified RFI protection scheme THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 6
InGenius Balanced Line Receiver Preliminary Information
THAT1206
THAT1206 or THAT1246 Gnd InIn+ Ref InIn+ Vee Vee Vcc CM out or N/C Vcc Vout CM in or Sense Connect for THAT1246
Vcc
+
Cb
Gnd InIn+ Vee
THAT1246 Ref In-
N/C Vcc
CM Out Vcc Vout CM in Connect for THAT1246
+
Cb
In+ Vout Vee Sense
Vee
Figure 5. Dual PCB layout for THAT 1206 and THAT 1246 DIP version
Figure 6. Dual PCB layout for THAT 1206 and THAT 1246 Surface mount versions
Dual Layout Option
The THAT 1246 is a conventional balanced line-receiver that is pin-for-pin compatible with the Analog Devices SSM2143 and Burr-Brown INA137. Though the THAT 1200 series is not pin-compatible with the THAT 1246, the PCB layouts shown in Figures 5 and 6 provide manufacturers with the option to stuff a PCB with any of these input stages. Note that these figures are not to scale. The interconnects should be as short as practicable constrained only by component size and relevant manufacturing considerations. When a THAT 1200 series IC is installed, capacitor Cb is connected between CM In and CM Out. When the THAT 1246 (or SSM2143 or INA137) is used, capacitor Cb is removed, and a jumper connects the Vout and Sense pins.
tionally, proper ESD handling precautions must be observed until the IC is properly affixed to the PCB.
Vcc IN+ R R' Vee CM IN Vcc R' INR
Vee
Figure 7. Internal input protection circuitry (see text) Part No. R R'
Input Protection
Figure 7 shows the internal overvoltage protection circuitry at the IN+, IN-, and CM IN pins. The values of R and R' vary with actual part number as shown in Table 3. While the internal protection circuitry shown is adequate to keep the combination of signal and common mode voltages from driving the internal inputs beyond the power supply rails, the circuitry does not provide adequate protection against most ESD incidents. Since these ICs will very often connect directly to the outside world, it is mandatory that additional, external protection from ESD be provided. Any unprotected InGenius input will fail when subjected to ESD if this protection circuitry is omitted. Addi-
THAT 1200 THAT 1203 THAT 1206
500W 7kW 7kW
23.5kW 17kW 17kW
Table 3. Input resistance values
Diodes D1-D6 in figures 3 and 4 show our recommended approach to protecting the 1200 series from ESD damage. This arrangement of 1N4148s and 12V Zener diodes permits the maximum allowable input signal to reach the IC's input pins, but directs high-energy ESD impulses to the rails. So long as the supply rails are adequately decoupled, most ESD events will be diminished to harmless levels.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A Preliminary Information
Page 7
Theory of Operation
Conventional high-CMRR balanced input stages cancel common-mode interference using a differential amplifier with matched (trimmed) resistance elements (Figure 8). When driven from a true voltage source, these conventional stages offer extremely high CMRR (>80dB). However, when driven from realworld sources, the CMRR of these stages degrades rapidly for even small source impedance imbalances. The reason why this occurs is easily shown. Figure 9 shows that a voltage divider is formed between the impedance of the external signal source and the input impedance of the differential amplifier. For perfectly balanced source impedances (Rs1 = Rs2), and perfectly balanced input impedances (Ri1 = Ri2), the voltage dividers formed at each node Ri1 Rs2 ( and ) will be equal to each other, Ri1 + Rs1 Ri 2 + Rs2 so the conventional input stage will maintain high CMRR. However, if the source impedances are not precisely equal, the voltage divider action will result in unequal signals at the plus and minus inputs of the input stage. In this case, no amount of CMRR is sufficient to reject the differential voltage that is generated by the impedance mismatch. To illustrate, consider Figure 10. A common mode input signal is shown as Vcm. It couples to the positive and negative input of the balanced line receiver via Rs1 and Rs2, repectively. Typically, conventional balanced line receivers have common-mode input impedances of approximately 10 kW. In such cases, a source impedance imbalance of only 10 W can degrade CMRR to about 65 dB. A 10 W mismatch may be easily caused by tolerances in coupling capacitors or output resistors, and variations in contact and wire resistance. The situation becomes even worse when a conventional balanced line receiver is driven from an unbalanced source. The best solution to this problem is to increase the line receiver's common-mode input impedance enough to minimize the imbalanced voltage divider effect, preferably on the order of several megohms. However, with a conventional differential amplifier, this requires the use of high resistances in the circuit. High resistance carries with it a high noise penalty, making this straightforward approach impractical for quality audio devices.
+Vin
Ri1
+
Ri2 -Vin
Figure 8. Basic differential amplifier
Vout
Rs1 +Vin Ri1
Rs1Rs2
+
Ri2 -Vin
Vout
Rs2
Figure 9. Basic differential amplifier showing mismatched source impedances
Rs1 +Vin Ri1
Rs1Rs2
+
Ri2 -Vin
Vout
Vcm Rs2
Figure 10. Basic differential amplifier driven by common-mode input signal
An alternative approach is to use the classic instrumentation amplifier configuration shown in Figure 11. In this circuit, the common-mode input impedance is the parallel combination of Ri1 and Ri2. Unfortunately for this approach, to achieve multi-megohm input impedances, the input devices used in the input amplifiers must have extremely low
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 8
InGenius Balanced Line Receiver Preliminary Information
bias currents since their input bias flows through Ri1 and Ri2. Because of the difficulty of maintaining low noise with low input bias currents, FET op amps may be employed, but they impose their own limitations, as described further on. The THAT 1200 series of balanced line receivers overcomes this problem by way of an AC bootstrap technique, shown in simplified form in Figure 12. By driving the lower end of R2 to nearly the same AC voltage as the upper end, AC current flow through R2 is greatly reduced, effectively increasing its value. At DC, of course, the input impedance Z is simply R1 + R2. If gain G is unity, for frequencies within the passband of the high-pass filter formed by Cb and R1, the effective value of the input impedance is increased to infinity at sufficiently high frequencies. Input impedance Z, at frequency f, is described the following equation: 1 + ( fn)2 1 + (1 f G)2( fD )2 f
+ In Ri1
+
-
OA1
+
OA2 - In Ri2
OA3 Out
+
Figure 11. Instrumentation amplifier
Z R2 Cb
Zi = (R1 + R 2)
R1
G=1
where fN = 1 , R1 2p( R1+ R 2) C R2 fD = 1 2pR1C
Figure 12. InGenius bootstrap topology
For example, if R1 and R2 are 10 kW each, ZDC is 20 kW. This resistance provides a DC path for amplifier bias current as well as leakage current that might flow from a signal source. At higher frequencies, the bootstrap greatly increases the input impedance, limited ultimately by how close gain G approaches unity. With the THAT 1200 input stages, common-mode input impedances of several megohms across much of the audio spectrum can be expected. Figure 1 shows a complete equivalent circuit for the THAT 1200-series ICs. OA1 and OA2 are high-impedance buffers feeding differential amplifier OA3 in an instrumentation amplifier configuration. The common mode signal is extracted at the junction of Rc and Rd, buffered by OA4, and fed back to both inputs via capacitor Cb and resistors Ra and Rb. The junction of Ra, Rb and R5 is driven to the same potential as the common-mode input voltage. Hence no common-mode current flows in resistors Ra and Rb. Since, ideally, no current flows, the input impedance to common mode signals is infinite.
The effectiveness of this topology is limited by the unity gain precision of OA4 and the input impedances of OA1 and OA2, all of which are optimized in THAT's integrated circuit process. Note that OA1 and OA2 isolate OA3 from external source impedances. Therefore, the performance of the differential amplifier OA3 and its associated components are not affected by imbalances in the source impedances.
Alternatives
In the following section we will compare other solutions for minimizing CMRR degradation in the presence of source impedance mismatch, and contrast them with THAT's InGenius topology. Precision 4-resistor op amp stage This stage (Figure 8) was discussed earlier. To summarize, this solution offers high common-mode rejection only when the source impedances are perfectly balanced, or a tiny fraction of the commonmode input impedance. Because differential- and
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A Preliminary Information
Page 9
common-mode input impedances are inextricably linked, and of similar magnitude, it is not possible to increase common-mode input impedance without compromising noise performance.
Second, this design requires at least two IC packages -- a dual FET op amp and the precision input stage. Third, while the large-value input resistances are shunted when there is a source connected to the input, there is no guarantee that long cables will always be properly terminated. With an unterminated cable plugged into the associated XLR jack, Ri1 and Ri2 are no longer shunted and become not only large noise sources themselves, but will do little to reduce pickup on the cable. The THAT 1200-series input stages avoid these problems altogether. They exhibit high commonmode input impedance as a result of their bootstrapped topology, while maintaining reasonable differential input resistances that can be left unshunted with no fear of stray pickup or excessive noise contribution. Transformers When true electrical isolation is required, a transformer may be the only solution. Transformers suitable for pro audio, however, tend to be costly and take up valuable board real estate. In addition, some transformers can color the sound in ways that electronic solutions do not. Fortunately, it is usually not the case that galvanic isolation is required, and in most cases it is the common-mode signal rejection properties of a transformer that is sought after. By providing the high common-mode input impedance of a transformer with the size and cost of an 8-pin integrated circuit, the THAT 1200-series provides designers with an alternative that provides excellent interference rejection in real-world applications.
3-op amp instrumentation amplifier
This topology, shown in Figure 11, was also discussed earlier. It relies on input buffers OA1 and OA2 to raise the common-mode and differentialmode input impedances. The following diff amp, OA3 (which can be of the precision 4-resistor op amp type), is then used to reject the common-mode signal while extracting the differential signal.
This approach will require reasonably low values for Ri1 and Ri2 (< 100 kW or so) unless the OA1 and OA2 use FETs at their inputs. This would limit the common-mode input impedance to a few hundred kilohms.
If FET-input devices are used for OA1 and OA2, Ri1 and Ri2 can be made quite large -- on the order of 10 megohms. Unlike the resistors in the conventional diff amp stage, these resistors will be shunted by the driving source impedance, and so contribute negligible noise.
At first glance, this might seem to be an excellent solution. However, there are disadvantages to this approach. First, the designer must select a FETinput op amp that is low-noise and that exhibits no phase inversion (sign reversal) with large differentialand common-mode signal swings. This, of course, results in a cost penalty that is somewhat exacerbated by the price premium for high-value resistors.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 10
InGenius Balanced Line Receiver Preliminary Information
Package Information
The THAT 1200 series is available in both 8-pin mini-DIP and 16-pin SOIC packages. The package dimensions are shown in Figures 13 and 14, while pinouts are given in Table 1.
E
F
B 1 A K F H D
ITEM A B C D E F G H J K
C G
J
B 1 D A J G C H
E
MILLIMETERS 9.520.10 6.350.10 7.49/8.13 0.46 2.54 3.68/4.32 0.25 3.180.10 8.13/9.40 3.300.10 INCHES 0.3750.004 0.2500.004 0.295/0.320 0.018 0.100 0.145/0.170 0.010 0.1250.004 0.320/0.370 0.1300.004
ITEM A B C D E F G H J
MILLIMETERS 10.11/10.31 7.40/7.60 10.11/10.51 0.36/0.46 1.27 2.44/2.64 0.23/0.32 0.51/1.01 0.10/0.30
INCHES 0.398/O.406 0.291/0.299 0.398/0.414 0.014/0.018 0.050 0.096/0.104 0.009/0.013 0.020/0.040 0.004/0.012
Figure 13. -P (DIP) version package outline drawing
Figure 14. -S (SO) version package outline drawing
Information furnished by THAT Corporation is believed to be accurate and reliable. However no responsibility is assumed by THAT Corporation for its use nor for any infringements of patents or other rights of third parties which may result from its use. LIFE SUPPORT POLICY THAT Corporation products are not designed for use in life support equipment where malfunction of such products can reasonably be expected to result in personal injury or death. The buyer uses or sells such products for life suport application at the buyer's own risk and agrees to hold harmless THAT Corporation from all damages, claims, suits or expense resulting from such use. CAUTION: THIS IS AN ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE. It can be damaged by the currents generated by electrostatic discharge. Static charge and therefore dangerous voltages can accumulate and discharge without detection causing a loss of function or performance to occur. The transistors in this device are unprotected in order to maximize performance and flexibility. They are more sensitive to ESD damage than many other ICs which include protection devices at their inputs. Use ESD preventative measures when storing and handling this device. Unused devices should be stored in conductive packaging. Packaging should be discharged before the devices are removed. ESD damage can occur to these devices even after they are installed in a board-level assembly. Circuits should include specific and appropriate ESD protection.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com

▲Up To Search▲

Price & Availability of 1203P

	To Download 1203P Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .